An Effective Timing-Driven Detailed Placement Algorithm for FPGAs

Shounak Dhar, Mahesh A. Iyer, Saurabh N. Adya, Love Singhal, Nikolay Rubanov, David Z. Pan. An Effective Timing-Driven Detailed Placement Algorithm for FPGAs. In Mustafa Ozdal, Chris Chu, editors, Proceedings of the 2017 ACM on International Symposium on Physical Design, ISDP 2017, Portland, OR, USA, March 19-22, 2017. pages 151-157, ACM, 2017. [doi]

@inproceedings{DharIASRP17,
  title = {An Effective Timing-Driven Detailed Placement Algorithm for FPGAs},
  author = {Shounak Dhar and Mahesh A. Iyer and Saurabh N. Adya and Love Singhal and Nikolay Rubanov and David Z. Pan},
  year = {2017},
  doi = {10.1145/3036669.3036682},
  url = {http://doi.acm.org/10.1145/3036669.3036682},
  researchr = {https://researchr.org/publication/DharIASRP17},
  cites = {0},
  citedby = {0},
  pages = {151-157},
  booktitle = {Proceedings of the 2017 ACM on International Symposium on Physical Design, ISDP 2017, Portland, OR, USA, March 19-22, 2017},
  editor = {Mustafa Ozdal and Chris Chu},
  publisher = {ACM},
  isbn = {978-1-4503-4696-2},
}