A 0.42V Vccmin ASIC-compatible pulse-latch solution as a replacement for a traditional master-slave flip-flop in a digital SOC

Sang H. Dhong, Richard Guo, Ming-Zhang Kuo, Ping-Lin Yang, Cheng-Chung Lin, Kevin Huang, Min-Jer Wang, Wei Hwang. A 0.42V Vccmin ASIC-compatible pulse-latch solution as a replacement for a traditional master-slave flip-flop in a digital SOC. In Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014, San Jose, CA, USA, September 15-17, 2014. pages 1-4, IEEE, 2014. [doi]

@inproceedings{DhongGKYLHWH14,
  title = {A 0.42V Vccmin ASIC-compatible pulse-latch solution as a replacement for a traditional master-slave flip-flop in a digital SOC},
  author = {Sang H. Dhong and Richard Guo and Ming-Zhang Kuo and Ping-Lin Yang and Cheng-Chung Lin and Kevin Huang and Min-Jer Wang and Wei Hwang},
  year = {2014},
  doi = {10.1109/CICC.2014.6946044},
  url = {http://dx.doi.org/10.1109/CICC.2014.6946044},
  researchr = {https://researchr.org/publication/DhongGKYLHWH14},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, CICC 2014, San Jose, CA, USA, September 15-17, 2014},
  publisher = {IEEE},
}