Formal worst-case timing analysis of Ethernet topologies with strict-priority and AVB switching - researchr publication authors

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Jonas Diemer, Daniel Thiele, Rolf Ernst. Formal worst-case timing analysis of Ethernet topologies with strict-priority and AVB switching. In 7th IEEE International Symposium on Industrial Embedded Systems, SIES 2012, Karlsruhe, Germany, June 20-22, 2012. pages 1-10, IEEE, 2012. [doi]

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