Hengyu Ding, Houran Ji, Jia Li, Jinhang Chen, Chiu-Wing Sham, Yao Wang 0013. A Memory-Efficient NTT Accelerator with a Highly Parallel Memory Mapping Scheme. In IEEE International Symposium on Circuits and Systems, ISCAS 2026, Shanghai, China, May 24-28, 2026. pages 3351-3355, IEEE, 2026. [doi]
Abstract is missing.