A. Doboli, N. Dhanwada, R. Vemuri. A heuristic technique for system-level architecture generation from signal-flow graph representations of analog systems. In IEEE International Symposium on Circuits and Systems, ISCAS 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings. pages 181-184, IEEE, 2000. [doi]
Abstract is missing.