A 32 Gb/s Data-Interpolator Receiver With Two-Tap DFE Fabricated With 28-nm CMOS Process

Yoshiyasu Doi, Takayuki Shibasaki, Takumi Danjo, Win Chaivipas, Takushi Hashida, Hiroki Miyaoka, Masanori Hoshino, Yoichi Koyanagi, T. Yamamoto, Sanroku Tsukamoto, H. Tamura. A 32 Gb/s Data-Interpolator Receiver With Two-Tap DFE Fabricated With 28-nm CMOS Process. J. Solid-State Circuits, 48(12):3258-3267, 2013. [doi]

Authors

Yoshiyasu Doi

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Takayuki Shibasaki

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Takumi Danjo

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Win Chaivipas

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Takushi Hashida

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Hiroki Miyaoka

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Masanori Hoshino

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Yoichi Koyanagi

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T. Yamamoto

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Sanroku Tsukamoto

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H. Tamura

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