Yoshiyasu Doi, Takayuki Shibasaki, Takumi Danjo, Win Chaivipas, Takushi Hashida, Hiroki Miyaoka, Masanori Hoshino, Yoichi Koyanagi, T. Yamamoto, Sanroku Tsukamoto, H. Tamura. A 32 Gb/s Data-Interpolator Receiver With Two-Tap DFE Fabricated With 28-nm CMOS Process. J. Solid-State Circuits, 48(12):3258-3267, 2013. [doi]
@article{DoiSDCHMHKYTT13-0,
title = {A 32 Gb/s Data-Interpolator Receiver With Two-Tap DFE Fabricated With 28-nm CMOS Process},
author = {Yoshiyasu Doi and Takayuki Shibasaki and Takumi Danjo and Win Chaivipas and Takushi Hashida and Hiroki Miyaoka and Masanori Hoshino and Yoichi Koyanagi and T. Yamamoto and Sanroku Tsukamoto and H. Tamura},
year = {2013},
doi = {10.1109/JSSC.2013.2278805},
url = {http://dx.doi.org/10.1109/JSSC.2013.2278805},
researchr = {https://researchr.org/publication/DoiSDCHMHKYTT13-0},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {48},
number = {12},
pages = {3258-3267},
}