High-speed analog simulation of CMOS vision chips using explicit integration techniques on many-core processors

Ginés Doménech-Asensi, Tom J. Kazmierski. High-speed analog simulation of CMOS vision chips using explicit integration techniques on many-core processors. In 2020 Design, Automation & Test in Europe Conference & Exhibition, DATE 2020, Grenoble, France, March 9-13, 2020. pages 646-649, IEEE, 2020. [doi]

@inproceedings{Domenech-Asensi20-0,
  title = {High-speed analog simulation of CMOS vision chips using explicit integration techniques on many-core processors},
  author = {Ginés Doménech-Asensi and Tom J. Kazmierski},
  year = {2020},
  doi = {10.23919/DATE48585.2020.9116270},
  url = {https://doi.org/10.23919/DATE48585.2020.9116270},
  researchr = {https://researchr.org/publication/Domenech-Asensi20-0},
  cites = {0},
  citedby = {0},
  pages = {646-649},
  booktitle = {2020 Design, Automation & Test in Europe Conference & Exhibition, DATE 2020, Grenoble, France, March 9-13, 2020},
  publisher = {IEEE},
  isbn = {978-3-9819263-4-7},
}