High-speed analog simulation of CMOS vision chips using explicit integration techniques on many-core processors

Ginés Doménech-Asensi, Tom J. Kazmierski. High-speed analog simulation of CMOS vision chips using explicit integration techniques on many-core processors. In 2020 Design, Automation & Test in Europe Conference & Exhibition, DATE 2020, Grenoble, France, March 9-13, 2020. pages 646-649, IEEE, 2020. [doi]

References

No references recorded for this publication.

Cited by

No citations of this publication recorded.