A 4 + 2T SRAM for Searching and In-Memory Computing With 0.3-V VDDmin

Qing Dong, Supreet Jeloka, Mehdi Saligane, Yejoong Kim, Masaru Kawaminami, Akihiko Harada, Satoru Miyoshi, Makoto Yasuda, David Blaauw, Dennis Sylvester. A 4 + 2T SRAM for Searching and In-Memory Computing With 0.3-V VDDmin. J. Solid-State Circuits, 53(4):1006-1015, 2018. [doi]

Authors

Qing Dong

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Supreet Jeloka

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Mehdi Saligane

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Yejoong Kim

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Masaru Kawaminami

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Akihiko Harada

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Satoru Miyoshi

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Makoto Yasuda

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David Blaauw

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Dennis Sylvester

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