A Digital Root Based Modular Reduction Technique for Power Efficient, Fault Tolerance in FPGAs

Richard Dorrance, Andrey Belogolovy, Hechen Wang, Xue Zhang. A Digital Root Based Modular Reduction Technique for Power Efficient, Fault Tolerance in FPGAs. In Nele Mentens, Leonel Sousa, Pedro Trancoso, Miquel Pericàs, Ioannis Sourdis, editors, 30th International Conference on Field-Programmable Logic and Applications, FPL 2020, Gothenburg, Sweden, August 31 - September 4, 2020. pages 341-346, IEEE, 2020. [doi]

Abstract

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