Rolf Drechsler, Alireza Mahzoon. Preserving Design Hierarchy Information for Polynomial Formal Verification. In 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, VLSI-SoC 2022, Patras, Greece, October 3-5, 2022. pages 1-7, IEEE, 2022. [doi]
@inproceedings{DrechslerM22,
title = {Preserving Design Hierarchy Information for Polynomial Formal Verification},
author = {Rolf Drechsler and Alireza Mahzoon},
year = {2022},
doi = {10.1109/VLSI-SoC54400.2022.9939650},
url = {https://doi.org/10.1109/VLSI-SoC54400.2022.9939650},
researchr = {https://researchr.org/publication/DrechslerM22},
cites = {0},
citedby = {0},
pages = {1-7},
booktitle = {30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, VLSI-SoC 2022, Patras, Greece, October 3-5, 2022},
publisher = {IEEE},
isbn = {978-1-6654-9005-4},
}