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Monolithic 3D Integration of FeFET, Hybrid CMOS Logic and Analog RRAM Array for Energy-Efficient Reconfigurable Computing-In-Memory Architecture

Yiwei Du, Jianshi Tang, Yijun Li, Yue Xi, Bin Gao 0006, He Qian, Huaqiang Wu. Monolithic 3D Integration of FeFET, Hybrid CMOS Logic and Analog RRAM Array for Energy-Efficient Reconfigurable Computing-In-Memory Architecture. In 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), Kyoto, Japan, June 11-16, 2023. pages 1-2, IEEE, 2023. [doi]

Authors

Yiwei Du

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Jianshi Tang

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Yijun Li

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Yue Xi

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Bin Gao 0006

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He Qian

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Huaqiang Wu

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