Optimization for offset and kickback-noise in novel CMOS double-tail dynamic comparator: A low-power, high-speed design approach using bulk-driven load

Avaneesh K. Dubey, R. K. Nagaria. Optimization for offset and kickback-noise in novel CMOS double-tail dynamic comparator: A low-power, high-speed design approach using bulk-driven load. Microelectronics Journal, 78:1-10, 2018. [doi]

Abstract

Abstract is missing.