0.5V CMOS logic delivering 200 million 8*8 bit multiplications/s at less than 100 fj based on a 50nm T-gate SOI technology - researchr publication authors

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Volker Dudek, Reinhard Grube, Bernd Höfflinger, Michael Schau. 0.5V CMOS logic delivering 200 million 8*8 bit multiplications/s at less than 100 fj based on a 50nm T-gate SOI technology. In Anantha Chandrakasan, Sayfe Kiaei, editors, Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998, Monterey, California, USA, August 10-12, 1998. pages 103-105, ACM, 1998. [doi]

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