Volker Dudek, Reinhard Grube, Bernd Höfflinger, Michael Schau. 0.5V CMOS logic delivering 200 million 8*8 bit multiplications/s at less than 100 fj based on a 50nm T-gate SOI technology. In Anantha Chandrakasan, Sayfe Kiaei, editors, Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998, Monterey, California, USA, August 10-12, 1998. pages 103-105, ACM, 1998. [doi]
@inproceedings{DudekGHS98,
title = {0.5V CMOS logic delivering 200 million 8*8 bit multiplications/s at less than 100 fj based on a 50nm T-gate SOI technology},
author = {Volker Dudek and Reinhard Grube and Bernd Höfflinger and Michael Schau},
year = {1998},
doi = {10.1145/280756.280810},
url = {http://doi.acm.org/10.1145/280756.280810},
tags = {logic},
researchr = {https://researchr.org/publication/DudekGHS98},
cites = {0},
citedby = {0},
pages = {103-105},
booktitle = {Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998, Monterey, California, USA, August 10-12, 1998},
editor = {Anantha Chandrakasan and Sayfe Kiaei},
publisher = {ACM},
isbn = {1-58113-059-7},
}