FLATS: Filling Logic and Testing Spatially for FPGA Authentication and Tamper Detection - researchr publication authors

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Adam Duncan, Grant Skipper, Andrew Stern, Adib Nahiyan, Fahim Rahman, Andrew Lukefahr, Mark Tehranipoor, Martin Swany. FLATS: Filling Logic and Testing Spatially for FPGA Authentication and Tamper Detection. In IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2019, McLean, VA, USA, May 5-10, 2019. pages 81-90, IEEE, 2019. [doi]

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