FLATS: Filling Logic and Testing Spatially for FPGA Authentication and Tamper Detection

Adam Duncan, Grant Skipper, Andrew Stern, Adib Nahiyan, Fahim Rahman, Andrew Lukefahr, Mark Tehranipoor, Martin Swany. FLATS: Filling Logic and Testing Spatially for FPGA Authentication and Tamper Detection. In IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2019, McLean, VA, USA, May 5-10, 2019. pages 81-90, IEEE, 2019. [doi]

@inproceedings{DuncanSSNRLTS19,
  title = {FLATS: Filling Logic and Testing Spatially for FPGA Authentication and Tamper Detection},
  author = {Adam Duncan and Grant Skipper and Andrew Stern and Adib Nahiyan and Fahim Rahman and Andrew Lukefahr and Mark Tehranipoor and Martin Swany},
  year = {2019},
  doi = {10.1109/HST.2019.8741025},
  url = {https://doi.org/10.1109/HST.2019.8741025},
  researchr = {https://researchr.org/publication/DuncanSSNRLTS19},
  cites = {0},
  citedby = {0},
  pages = {81-90},
  booktitle = {IEEE International Symposium on Hardware Oriented Security and Trust, HOST 2019, McLean, VA, USA, May 5-10, 2019},
  publisher = {IEEE},
  isbn = {978-1-5386-8064-3},
}