George Economakos, K. Anagnostopoulos. Bit level architectural exploration technique for the design of low power multipliers. In International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece. IEEE, 2006. [doi]
@inproceedings{EconomakosA06,
title = {Bit level architectural exploration technique for the design of low power multipliers},
author = {George Economakos and K. Anagnostopoulos},
year = {2006},
doi = {10.1109/ISCAS.2006.1692877},
url = {http://dx.doi.org/10.1109/ISCAS.2006.1692877},
tags = {architecture, design},
researchr = {https://researchr.org/publication/EconomakosA06},
cites = {0},
citedby = {0},
booktitle = {International Symposium on Circuits and Systems (ISCAS 2006), 21-24 May 2006, Island of Kos, Greece},
publisher = {IEEE},
}