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George Economakos, Sotirios Xydis. High-level synthesis with coarse grain reconfigurable components. In 23rd IEEE International Symposium on Parallel and Distributed Processing, IPDPS 2009, Rome, Italy, May 23-29, 2009. pages 1-4, IEEE, 2009. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: High-Level Synthesis Methodologies for Delay-Area Optimized Coarse-Grained Reconfigurable Coprocessor ArchitecturesSotirios Xydis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos. isvlsi 2010: 486-487 [doi] High-level synthesis with reconfigurable datapath componentsGeorge Economakos. ipps 2006: [doi]
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