An Efficient Iterative Improvement Technique for VLSI Circuit Partitioning Using Hybrid Bucket Structures

C. K. Eem, J. W. Chong. An Efficient Iterative Improvement Technique for VLSI Circuit Partitioning Using Hybrid Bucket Structures. In Proceedings of the 1999 Conference on Asia South Pacific Design Automation, January 18-21, 1999, Wanchai, Hong Kong. pages 73-76, IEEE, 1999. [doi]

Abstract

Abstract is missing.