Low-Jitter Multi-Output All-Digital Clock Generator Using DTC-Based Open Loop Fractional Dividers - researchr publication

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Ahmed Elkholy, Saurabh Saxena, Guanghua Shu, Amr Elshazly, Pavan Kumar Hanumolu. Low-Jitter Multi-Output All-Digital Clock Generator Using DTC-Based Open Loop Fractional Dividers. J. Solid-State Circuits, 53(6):1806-1817, 2018. [doi]

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