A 5nm Wide Voltage Range Ultra High Density SRAM Design for L2/L3 Cache Applications

Sriharsha Enjapuri, Deepesh Gujjar, Sandipan Sinha, Ramesh Halli, Manish Trivedi. A 5nm Wide Voltage Range Ultra High Density SRAM Design for L2/L3 Cache Applications. In 34th International Conference on VLSI Design and 20th International Conference on Embedded Systems, VLSID 2021, Guwahati, India, February 20-24, 2021. pages 151-156, IEEE, 2021. [doi]

Abstract

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