Clock Driver Design for Low-Power High-Speed 90-nm CMOS Register Array - researchr publication authors

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Tadayoshi Enomoto, Suguru Nagayama, Hiroaki Shikano, Yousuke Hagiwara. Clock Driver Design for Low-Power High-Speed 90-nm CMOS Register Array. IEICE Transactions, 91-C(4):553-561, 2008. [doi]

This author has not been identified. Look up 'Tadayoshi Enomoto' in GoogleThis author has not been identified. Look up 'Suguru Nagayama' in GoogleThis author has not been identified. Look up 'Hiroaki Shikano' in GoogleThis author has not been identified. Look up 'Yousuke Hagiwara' in Google

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