An Inherently Secure FPGA using PUF Hardware-Entanglement and Side-Channel Resistant Logic in 65nm Bulk CMOS - researchr publication authors

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Burak Erbagci, Nail Etkin Can Akkaya, Cagri Erbagci, Ken Mai. An Inherently Secure FPGA using PUF Hardware-Entanglement and Side-Channel Resistant Logic in 65nm Bulk CMOS. In 45th IEEE European Solid State Circuits Conference, ESSCIRC 2019, Cracow, Poland, September 23-26, 2019. pages 65-68, IEEE, 2019. [doi]

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