Optimized synthesis techniques for testable sequential circuits

Bernhard Eschermann, Hans-Joachim Wunderlich. Optimized synthesis techniques for testable sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems, 11(3):301-312, 1992. [doi]

@article{EschermannW92,
  title = {Optimized synthesis techniques for testable sequential circuits},
  author = {Bernhard Eschermann and Hans-Joachim Wunderlich},
  year = {1992},
  doi = {10.1109/43.124417},
  url = {http://doi.ieeecomputersociety.org/10.1109/43.124417},
  tags = {optimization, testing},
  researchr = {https://researchr.org/publication/EschermannW92},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on CAD of Integrated Circuits and Systems},
  volume = {11},
  number = {3},
  pages = {301-312},
}