Simultaneous multithreaded vector architecture: merging ILP and DLP for high performance - researchr publication related

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Roger Espasa, Mateo Valero. Simultaneous multithreaded vector architecture: merging ILP and DLP for high performance. In Proceedings of the Fourth International on High-Performance Computing, HiPC 1997, Bangalore, India, 18-21 December, 1997. pages 350-357, IEEE Computer Society, 1997. [doi]

The following publications are possibly variants of this publication:

A case for merging the ILP and DLP paradigmsFrancisca Quintana, Roger Espasa, Mateo Valero. In PDP. 1998: 217-224 [doi]

Multithreaded Vector ArchitecturesRoger Espasa, Mateo Valero. hpca 1997: 237 [doi]

A Complexity-Effective Simultaneous Multithreading ArchitectureCarmelo Acosta, Ayose Falcón, Alex Ramírez, Mateo Valero. icpp 2005: 157-164 [doi]

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