An embedded read only memory architecture with a complementary and two interchangeable power/performance design points

Steven Eustis. An embedded read only memory architecture with a complementary and two interchangeable power/performance design points. In Proceedings 2004 IEEE International SOC Conference, September 12-15, 2004, Hilton Santa Clara, CA, USA. pages 187-190, IEEE, 2004. [doi]

Abstract

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