An On-Chip Test Clock Control Scheme for Multi-Clock At-Speed Testing

Xiaoxin Fan, Yu Hu 0001, Laung-Terng Wang. An On-Chip Test Clock Control Scheme for Multi-Clock At-Speed Testing. In 16th Asian Test Symposium, ATS 2007, Beijing, China, October 8-11, 2007. pages 341-348, IEEE, 2007. [doi]

@inproceedings{FanHW07,
  title = {An On-Chip Test Clock Control Scheme for Multi-Clock At-Speed Testing},
  author = {Xiaoxin Fan and Yu Hu 0001 and Laung-Terng Wang},
  year = {2007},
  doi = {10.1109/ATS.2007.61},
  url = {https://doi.org/10.1109/ATS.2007.61},
  researchr = {https://researchr.org/publication/FanHW07},
  cites = {0},
  citedby = {0},
  pages = {341-348},
  booktitle = {16th Asian Test Symposium, ATS 2007, Beijing, China, October 8-11, 2007},
  publisher = {IEEE},
  isbn = {978-0-7695-2890-8},
}