Chaoming Fang, Habib Derbyshire, Wenyu Sun, Jinshan Yue, Haobing Shi, Yongpan Liu. A Sort-Less FPGA-Based Non-Maximum Suppression Accelerator using Multi-Thread Computing and Binary Max Engine for Object Detection. In IEEE Asian Solid-State Circuits Conference, A-SSCC 2021, Busan, Korea, Republic of, November 7-10, 2021. pages 1-3, IEEE, 2021. [doi]
@inproceedings{FangDSYSL21,
title = {A Sort-Less FPGA-Based Non-Maximum Suppression Accelerator using Multi-Thread Computing and Binary Max Engine for Object Detection},
author = {Chaoming Fang and Habib Derbyshire and Wenyu Sun and Jinshan Yue and Haobing Shi and Yongpan Liu},
year = {2021},
doi = {10.1109/A-SSCC53895.2021.9634708},
url = {https://doi.org/10.1109/A-SSCC53895.2021.9634708},
researchr = {https://researchr.org/publication/FangDSYSL21},
cites = {0},
citedby = {0},
pages = {1-3},
booktitle = {IEEE Asian Solid-State Circuits Conference, A-SSCC 2021, Busan, Korea, Republic of, November 7-10, 2021},
publisher = {IEEE},
isbn = {978-1-6654-4350-0},
}