FPGA based fast and high-throughput 2-slow retiming 128-bit AES encryption algorithm

Reza Rezaeian Farashahi, Bahram Rashidi, Sayed Masoud Sayedi. FPGA based fast and high-throughput 2-slow retiming 128-bit AES encryption algorithm. Microelectronics Journal, 45(8):1014-1025, 2014. [doi]

Abstract

Abstract is missing.