Mahdi Fazeli, Reza Farivar, Seyed Ghassem Miremadi. Error Detection Enhancement in PowerPC Architecture-based Embedded Processors. J. Electronic Testing, 24(1-3):21-33, 2008. [doi]
@article{FazeliFM08,
title = {Error Detection Enhancement in PowerPC Architecture-based Embedded Processors},
author = {Mahdi Fazeli and Reza Farivar and Seyed Ghassem Miremadi},
year = {2008},
doi = {10.1007/s10836-007-5017-3},
url = {http://dx.doi.org/10.1007/s10836-007-5017-3},
tags = {rule-based, architecture},
researchr = {https://researchr.org/publication/FazeliFM08},
cites = {0},
citedby = {0},
journal = {J. Electronic Testing},
volume = {24},
number = {1-3},
pages = {21-33},
}