Fabrizio Ferrandi, G. Ferrara, R. Palazzo, Vincenzo Rana, Marco D. Santambrogio. VHDL to FPGA automatic IP-Core generation: a case study on Xilinx design flow. In 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), Proceedings, 25-29 April 2006, Rhodes Island, Greece. IEEE, 2006. [doi]
Abstract is missing.