João Canas Ferreira, Jose Fonseca. An FPGA implementation of a long short-term memory neural network. In Peter M. Athanas, René Cumplido, Claudia Feregrino, Ron Sass, editors, International Conference on ReConFigurable Computing and FPGAs, ReConFig 2016, Cancun, Mexico, November 30 - Dec. 2, 2016. pages 1-8, IEEE, 2016. [doi]
@inproceedings{FerreiraF16-0,
title = {An FPGA implementation of a long short-term memory neural network},
author = {João Canas Ferreira and Jose Fonseca},
year = {2016},
doi = {10.1109/ReConFig.2016.7857151},
url = {http://dx.doi.org/10.1109/ReConFig.2016.7857151},
researchr = {https://researchr.org/publication/FerreiraF16-0},
cites = {0},
citedby = {0},
pages = {1-8},
booktitle = {International Conference on ReConFigurable Computing and FPGAs, ReConFig 2016, Cancun, Mexico, November 30 - Dec. 2, 2016},
editor = {Peter M. Athanas and René Cumplido and Claudia Feregrino and Ron Sass},
publisher = {IEEE},
isbn = {978-1-5090-3707-0},
}