VLSI Implementation of a Fault-Tolerant Distributed Clock Generation

M. Ferringer, G. Fuchs, A. Steininger, G. Kempf. VLSI Implementation of a Fault-Tolerant Distributed Clock Generation. In 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 4-6 October 2006, Arlington, Virginia, USA. pages 563-571, IEEE Computer Society, 2006. [doi]

@inproceedings{FerringerFSK06,
  title = {VLSI Implementation of a Fault-Tolerant Distributed Clock Generation},
  author = {M. Ferringer and G. Fuchs and A. Steininger and G. Kempf},
  year = {2006},
  doi = {10.1109/DFT.2006.67},
  url = {http://doi.ieeecomputersociety.org/10.1109/DFT.2006.67},
  researchr = {https://researchr.org/publication/FerringerFSK06},
  cites = {0},
  citedby = {0},
  pages = {563-571},
  booktitle = {21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 4-6 October 2006, Arlington, Virginia, USA},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2706-X},
}