VLSI Implementation of a Fault-Tolerant Distributed Clock Generation

M. Ferringer, G. Fuchs, A. Steininger, G. Kempf. VLSI Implementation of a Fault-Tolerant Distributed Clock Generation. In 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 4-6 October 2006, Arlington, Virginia, USA. pages 563-571, IEEE Computer Society, 2006. [doi]

Abstract

Abstract is missing.