A 165 MS/s 8-bit CMOS A/D converter with background offset cancellation

Gennady Feygin, Krishnaswamy Nagaraj, Ranjan Chattopadhyay, R. Herrera, I. Papantonopoulos, David A. Martin, P. Wu, Shanthi Pavan. A 165 MS/s 8-bit CMOS A/D converter with background offset cancellation. In Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, CICC 2001, San Diego, CA, USA, May 6-9, 2001. pages 153-156, IEEE, 2001. [doi]

@inproceedings{FeyginNCHPMWP01,
  title = {A 165 MS/s 8-bit CMOS A/D converter with background offset cancellation},
  author = {Gennady Feygin and Krishnaswamy Nagaraj and Ranjan Chattopadhyay and R. Herrera and I. Papantonopoulos and David A. Martin and P. Wu and Shanthi Pavan},
  year = {2001},
  doi = {10.1109/CICC.2001.929745},
  url = {https://doi.org/10.1109/CICC.2001.929745},
  researchr = {https://researchr.org/publication/FeyginNCHPMWP01},
  cites = {0},
  citedby = {0},
  pages = {153-156},
  booktitle = {Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, CICC 2001, San Diego, CA, USA, May 6-9, 2001},
  publisher = {IEEE},
  isbn = {0-7803-6591-7},
}