Leo Filippini, Baris Taskin. A charge recovery logic system bus. In ACM/IEEE 2017 International Workshop on System Level Interconnect Prediction, SLIP 2017, Austin, TX, USA, June 17, 2017. pages 1-4, IEEE, 2017. [doi]
@inproceedings{FilippiniT17, title = {A charge recovery logic system bus}, author = {Leo Filippini and Baris Taskin}, year = {2017}, doi = {10.1109/SLIP.2017.7974909}, url = {https://doi.org/10.1109/SLIP.2017.7974909}, researchr = {https://researchr.org/publication/FilippiniT17}, cites = {0}, citedby = {0}, pages = {1-4}, booktitle = {ACM/IEEE 2017 International Workshop on System Level Interconnect Prediction, SLIP 2017, Austin, TX, USA, June 17, 2017}, publisher = {IEEE}, isbn = {978-1-5386-1536-2}, }