Debugging HDL designs based on functional equivalences with high-level specifications - researchr publication authors

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Alexander Finder, Jan-Philipp Witte, Görschwin Fey. Debugging HDL designs based on functional equivalences with high-level specifications. In Lukás Sekanina, Görschwin Fey, Jaan Raik, Snorre Aunet, Richard Ruzicka, editors, 16th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, DDECS 2013, Karlovy Vary, Czech Republic, April 8-10, 2013. pages 60-65, IEEE Computer Society, 2013. [doi]

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