A high-level dynamic-error model of a pipelined analog-to-digital converter

K. Folkesson, C. Svensson, B. Knuthammar, A. Dreyfert. A high-level dynamic-error model of a pipelined analog-to-digital converter. In International Symposium on Circuits and Systems (ISCAS 2005), 23-26 May 2005, Kobe, Japan. pages 5625-5628, IEEE, 2005. [doi]

Abstract

Abstract is missing.