An Exploration of ATPG Methods for Redacted IP and Reconfigurable Hardware

Jackson Fugate, Greg Stitt, Naren Vikram Raj Masna, Aritra Dasgupta, Swarup Bhunia, Nij Dorairaj, David Kehlet. An Exploration of ATPG Methods for Redacted IP and Reconfigurable Hardware. In 41st IEEE VLSI Test Symposium, VTS 2023, San Diego, CA, USA, April 24-26, 2023. pages 1-7, IEEE, 2023. [doi]

Abstract

Abstract is missing.