Physical Versus Logical Fault Models MOS LSI Circuits: Impact on Their Testability

J. Galiay, Yves Crouzet, M. Vergniault. Physical Versus Logical Fault Models MOS LSI Circuits: Impact on Their Testability. IEEE Transactions on Computers, 29(6):527-531, 1980.

Authors

J. Galiay

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Yves Crouzet

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M. Vergniault

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