PowerPC:::TM::: Array Verification Methodology using Formal Techniques

Neeta Ganguly, Magdy S. Abadir, Manish Pandey. PowerPC:::TM::: Array Verification Methodology using Formal Techniques. In Proceedings IEEE International Test Conference 1996, Test and Design Validity, Washington, DC, USA, October 20-25, 1996. pages 857-864, IEEE Computer Society, 1996.

Abstract

Abstract is missing.