Gate Sizing and V{t} Assignment for Active-Mode Leakage Power Reduction

Feng Gao, John P. Hayes. Gate Sizing and V{t} Assignment for Active-Mode Leakage Power Reduction. In 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 11-13 October 2004, San Jose, CA, USA, Proceedings. pages 258-264, IEEE Computer Society, 2004. [doi]

@inproceedings{GaoH04:2,
  title = {Gate Sizing and V{t} Assignment for Active-Mode Leakage Power Reduction},
  author = {Feng Gao and John P. Hayes},
  year = {2004},
  url = {http://csdl.computer.org/comp/proceedings/iccd/2004/2231/00/22310258abs.htm},
  researchr = {https://researchr.org/publication/GaoH04%3A2},
  cites = {0},
  citedby = {0},
  pages = {258-264},
  booktitle = {22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 11-13 October 2004, San Jose, CA, USA, Proceedings},
  publisher = {IEEE Computer Society},
  isbn = {0-7695-2231-9},
}