Low-Jitter Multi-phase Clock Generation: A Comparison between DLLs and Shift Registers

Xiang Gao, Eric A. M. Klumperink, Bram Nauta. Low-Jitter Multi-phase Clock Generation: A Comparison between DLLs and Shift Registers. In International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA. pages 2854-2857, IEEE, 2007. [doi]

Abstract

Abstract is missing.