High Performance CMOS 2-input NAND Based on Low-race Split-level Charge-recycling Pass-transistor Logic

Jose Carlos Garcia-Montesdeoca, Juan A. Montiel-Nelson, Saeid Nooshabadi. High Performance CMOS 2-input NAND Based on Low-race Split-level Charge-recycling Pass-transistor Logic. In Antonio Núñez, Pedro P. Carballo, editors, 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools, DSD 2009, 27-29 August 2009, Patras, Greece. pages 593-596, IEEE Computer Society, 2009. [doi]

Abstract

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