STT-MRAM Stochastic and Defects-aware DTCO for Last Level Cache at Advanced Process Nodes

F. GarcĂ­a-Redondo, S. Rao, M. Gupta, Manu Perumkunnil, Y. Xiang, D. Abdi, Simon Van Beek, S. Couet, Marie Garcia Bardon. STT-MRAM Stochastic and Defects-aware DTCO for Last Level Cache at Advanced Process Nodes. In 53rd IEEE European Solid-State Device Research Conference, ESSDERC 2023, Lisbon, Portugal, September 11-14, 2023. pages 97-100, IEEE, 2023. [doi]

Abstract

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