3D simulation and analysis of the radiation tolerance of voltage scaled digital circuit

Rajesh Garg, Sunil P. Khatri. 3D simulation and analysis of the radiation tolerance of voltage scaled digital circuit. In 27th International Conference on Computer Design, ICCD 2009, Lake Tahoe, CA, USA, October 4-7, 2009. pages 498-504, IEEE, 2009. [doi]

@inproceedings{GargK09-1,
  title = {3D simulation and analysis of the radiation tolerance of voltage scaled digital circuit},
  author = {Rajesh Garg and Sunil P. Khatri},
  year = {2009},
  doi = {10.1109/ICCD.2009.5413111},
  url = {http://dx.doi.org/10.1109/ICCD.2009.5413111},
  researchr = {https://researchr.org/publication/GargK09-1},
  cites = {0},
  citedby = {0},
  pages = {498-504},
  booktitle = {27th International Conference on Computer Design, ICCD 2009, Lake Tahoe, CA, USA, October 4-7, 2009},
  publisher = {IEEE},
  isbn = {978-1-4244-5029-9},
}