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Mario Garrido. Multiplexer and Memory-Efficient Circuits for Parallel Bit Reversal. IEEE Trans. on Circuits and Systems, 66-II(4):657-661, 2019. [doi]
Possibly Related PublicationsThe following publications are possibly variants of this publication: Optimum Circuits for Bit ReversalMario Garrido, Jesús Grajal, Oscar Gustafsson. tcas, 58-II(10):657-661, 2011. [doi]
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