Catherine H. Gebotys, Robert J. Gebotys. An empirical comparison of algorithmic, instruction, and architectural power prediction models for high performance embedded DSP processors. In Anantha Chandrakasan, Sayfe Kiaei, editors, Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998, Monterey, California, USA, August 10-12, 1998. pages 121-123, ACM, 1998. [doi]
Abstract is missing.